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low skew, 1-to-4 differential-to- lvds fanout buffer ICS854S14I idt ? / ics ? lvds fanout buffer 1 ics854s14aki rev. a february 23, 2007 preliminary g eneral d escription the ICS854S14I is a high speed 1-to-4 differential- to-lvds fanout buffer and is a member of the hiperclocks ? family of high performance clock solutions from idt. the ICS854S14I is optimized for high speed and very low output skew, making it suitable for use in demanding applications such as sonet, 1 gigabit and 10 gigabit ethernet, and fibre channel. the internally terminated differential input and v ref _ ac pin allow other differential signal families such as lvpecl, lvds, and sstl to be easily interfaced to the input with minimal use of external components. the device also has output enable pins which may be useful for system test and debug purposes. a pplications : ? processor clock distribution ? 622mhz central office clock distribution ? high speed network routing ? wireless basestations ? serdes lvpecl output to fpga lvds input translator ? fibre channel clock distribution ? amc clock driver for atca systems ? gigabit ethernet clock distibution f eatures ? four differential lvds outputs ? in, nin pair can accept the following differential input levels: lvpecl, lvds, sstl ? 50 internal input termination to v t ? output frequency: 1.5ghz ? output skew: 30ps (typical) ? part-to-part skew: tbd ? additive phase jitter, rms: 0.135ps (typical) ? propagation delay: 1.1ns (typical) ? 2.5v operating supply ? -40c to 85c ambient operating temperature ? available in both standard (rohs 5) and lead-free (rohs 6) packages b lock d iagram p in a ssignment hiperclocks? ic s 50 50 q0 nq0 q1 nq1 q2 nq2 q3 nq3 oe0 oe1 in v t nin oe2 oe3 v ref_ac ICS854S14I 24-lead vfqfn 4mm x 4mm x 0.95 package body k package top view v dd q3 nq3 nq2 q2 gnd gnd oe0 oe1 oe2 oe3 v dd 1 2 3 4 5 6 18 17 16 15 14 13 7 8 9 10 11 12 24 23 22 21 20 19 v dd nin vt in v ref _ ac gnd gnd q0 nq0 nq1 q1 v dd the preliminary information presented herein represents a product in pre-production. the noted characteristics are based on ini tial product characterization and/or qualification. integrated device technology, incorporated (idt) reserves the right to change any circuitry or specificat ions without notice.
idt ? / ics ? lvds fanout buffer 2 ics854s14aki rev. a february 23, 2007 ICS854S14I low skew, 1-to-4 differential-t o-lvds fanout buffer preliminary t able 1. p in d escriptions t able 2. p in c haracteristics l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u r p u l l u p r o t s i s e r p u l l u p t u p n i 1 5k r e b m u ne m a ne p y tn o i t p i r c s e d 4 2 , 3 1 , 2 1 , 1d n gr e w o p. d n u o r g y l p p u s r e w o p 3 , 20 q n , 0 qt u p t u o. s l e v e l e c a f r e t n i s d v l . r i a p t u p t u o l a i t n e r e f f i d 5 , 41 q , 1 q nt u p t u o. s l e v e l e c a f r e t n i s d v l . r i a p t u p t u o l a i t n e r e f f i d 9 1 , 8 1 , 7 , 6v d d r e w o p. s n i p y l p p u s e v i t i s o p 8n i nt u p n i0 5 . t u p n i k c o l c l a i t n e r e f f i d g n i t r e v n i v o t n o i t a n i m r e t t u p n i l a n r e t n i t . 9v t t u p n i. t u p n i n o i t a n i m r e t 0 1n it u p n i0 5 . t u p n i k c o l c l a i t n e r e f f i d g n i t r e v n i - n o n v o t n o i t a n i m r e t t u p n i l a n r e t n i t . 1 1v c a _ f e r t u p t u o. s n o i t a c i l p p a d e l p u o c - c a r o f e g a t l o v e c n e r e f e r 5 1 , 4 12 q n , 2 qt u p t u o. s l e v e l e c a f r e t n i s d v l . r i a p t u p t u o l a i t n e r e f f i d 7 1 , 6 13 q , 3 q nt u p t u o. s l e v e l e c a f r e t n i s d v l . r i a p t u p t u o l a i t n e r e f f i d , 1 2 , 0 2 3 2 , 2 2 , 2 e o , 3 e o 0 e o , 1 e o t u p n ip u l l u p . d e l b a n e s i r i a p t u p t u o e h t , h g i h c i g o l n e h w . e l b a n e t u p t u o h g i h e v i t c a x e o e h t . e t a t s e c n a d e p m i h g i h a n i s i r i a p t u p t u o e h t , w o l c i g o l n e h w e h t f o e t a t s p u - r e w o p t l u a f e d e h t o s r o t s i s e r p u l l u p l a n r e t n i n a e v a h s n i p . s l e v e l e c a f r e t n i l t t v l / s o m c v l . d e l b a n e e r a s t u p t u o : e t o n p u l l u p . s e u l a v l a c i p y t r o f , s c i t s i r e t c a r a h c n i p , 2 e l b a t e e s . s r o t s i s e r t u p n i l a n r e t n i o t s r e f e r
idt ? / ics ? lvds fanout buffer 3 ics854s14aki rev. a february 23, 2007 ICS854S14I low skew, 1-to-4 differential-t o-lvds fanout buffer preliminary f igure 1. oe t iming d iagram oe[0:3] in nin q[0:3] nq[0:3] high impedance state enabled disabled t able 3. oe x t ruth t able s t u p n is t u p t u o n in i n0 e o0 q0 q n 0110 1 10 1 1 0 xx 0 z - i hz - i h n in i n1 e o1 q1 q n 0110 1 10 1 1 0 xx 0 z - i hz - i h n in i n2 e o2 q2 q n 0110 1 10 1 1 0 xx 0 z - i hz - i h n in i n3 e o3 q3 q n 0110 1 10 1 1 0 xx 0 z - i hz - i h
idt ? / ics ? lvds fanout buffer 4 ics854s14aki rev. a february 23, 2007 ICS854S14I low skew, 1-to-4 differential-t o-lvds fanout buffer preliminary t able 4a. p ower s upply dc c haracteristics , v dd = 2.5v 5%; t a = -40c to 85c a bsolute m aximum r atings note: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these ratings are stress specifications only. functional op- eration of product at these conditions or any conditions beyond those listed in the dc characteristics or ac characteristics is not implied. exposure to absolute maximum rating conditions for ex- tended periods may affect product reliability. supply voltage, v dd 4.6v inputs, v i -0.5v to v dd + 0.5 v outputs, i o (lvds) contin uous current 10ma surge current 15ma input current, in, nin 50ma v t current, i vt 100ma input sink/source, i ref_ac 0.5ma operating temperature range, ta -40c to +85c storage temperature, t stg -65c to 150c package thermal impedance, ja 50.2c (0 mps) (junction-to-ambient) t able 4b. lvcmos/lvttl dc c haracteristics , v dd = 2.5v 5%; t a = -40c to 85c t able 4c. d ifferential dc c haracteristics , v dd = 2.5v 5%; t a = -40c to 85c l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u v d d e g a t l o v y l p p u s e v i t i s o p 5 7 3 . 25 . 25 2 6 . 2v i d d t n e r r u c y l p p u s r e w o p 8 8a m l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u v h i e g a t l o v h g i h t u p n i 7 . 1v d d 3 . 0 +v v l i e g a t l o v w o l t u p n i 07 . 0v i h i t n e r r u c h g i h t u p n i] 3 : 0 [ e ov d d v = n i v 5 2 6 . 2 =5a i l i t n e r r u c w o l t u p n i] 3 : 0 [ e ov d d v , v 5 2 6 . 2 = n i v 0 =0 5 1 -a l o b m y sl o b m y s l o b m y s l o b m y sl o b m y sr e t e m a r a pr e t e m a r a p r e t e m a r a p r e t e m a r a pr e t e m a r a ps n o i t i d n o c t s e ts n o i t i d n o c t s e t s n o i t i d n o c t s e t s n o i t i d n o c t s e ts n o i t i d n o c t s e tm u m i n i mm u m i n i m m u m i n i m m u m i n i mm u m i n i ml a c i p y tl a c i p y t l a c i p y t l a c i p y tl a c i p y tm u m i x a mm u m i x a m m u m i x a m m u m i x a mm u m i x a ms t i n us t i n u s t i n u s t i n us t i n u r n i e c n a t s i s e r t u p n i l a i t n e r e f f i d) n i n , n i (t v - o t - n i0 40 50 6 v h i e g a t l o v h g i h t u p n i) n i n , n i (2 . 1v d d v v l i e g a t l o v w o l t u p n i) n i n , n i (0v h i 5 1 . 0 -v v n i g n i w s e g a t l o v t u p n i 5 1 . 08 . 2v v c a _ f e r e g a t l o v e c n e r e f e rv d d 2 4 . 1 -v d d 7 3 . 1 -v d d 2 3 . 1 -v v n i _ f f i d g n i w s e g a t l o v t u p n i l a i t n e r e f f i d 3 . 04 . 3v i n i 1 e t o n ; t n e r r u c t u p n i) n i n , n i (5 3a m . n g i s e d y b d e e t n a r a u g : 1 e t o n
idt ? / ics ? lvds fanout buffer 5 ics854s14aki rev. a february 23, 2007 ICS854S14I low skew, 1-to-4 differential-t o-lvds fanout buffer preliminary t able 4d. lvds dc c haracteristics , v dd = 2.5v 5%; t a = -40c to 85c t able 5. ac c haracteristics , v dd = 2.5v 5%; t a = -40c to 85c l o b m y sr e t e m a r a ps n o i t i d n o c t s e tm u m i n i ml a c i p y tm u m i x a ms t i n u v d o e g a t l o v t u p t u o l a i t n e r e f f i d 0 5 3v m v d o v d o e g n a h c e d u t i n g a m 0 5v m v s o e g a t l o v t e s f f o 2 . 1v v s o v s o e g n a h c e d u t i n g a m 0 5v m l o b m y sr e t e m a r a pn o i t i d n o cm u m i n i ml a c i p y tm u m i x a ms t i n u f x a m y c n e u q e r f t u p t u o m u m i x a m 5 . 1z h g t d p ; ) l a i t n e r e f f i d ( ; y a l e d n o i t a g a p o r p 1 e t o n 1 . 1s n t ) o ( k s4 , 2 e t o n ; w e k s t u p t u o 0 3s p t ) p p ( k s4 , 3 e t o n ; w e k s t r a p - o t - t r a p d b ts p t t i j ; s m r , r e t t i j e s a h p e v i t i d d a r e f f u b n o i t c e s r e t t i j e s a h p e v i t i d d a o t r e f e r : e g n a r n o i t a r g e t n i , z h m 0 0 2 z h m 0 2 - z h k 2 1 5 3 1 . 0s p t r /t f e m i t l l a f / e s i r t u p t u o% 0 8 o t % 0 20 7 1s p t a d e r u s a e m e r a s r e t e m a r a p l l a . d e t o n e s i w r e h t o s s e l n u z h g 1 . t n i o p g n i s s o r c t u p t u o l a i t n e r e f f i d e h t o t t n i o p g n i s s o r c t u p n i l a i t n e r e f f i d e h t m o r f d e r u s a e m : 1 e t o n . s n o i t i d n o c d a o l l a u q e h t i w d n a e g a t l o v y l p p u s e m a s e h t t a s t u p t u o n e e w t e b w e k s s a d e n i f e d : 2 e t o n . s t n i o p s s o r c l a i t n e r e f f i d t u p t u o e h t t a d e r u s a e m s e g a t l o v y l p p u s e m a s e h t t a g n i t a r e p o s e c i v e d t n e r e f f i d n o s t u p t u o n e e w t e b w e k s s a d e n i f e d : 3 e t o n d e r u s a e m e r a s t u p t u o e h t , e c i v e d h c a e n o s t u p n i f o e p y t e m a s e h t g n i s u . s n o i t i d n o c d a o l l a u q e h t i w d n a . s t n i o p s s o r c l a i t n e r e f f i d e h t t a . 5 6 d r a d n a t s c e d e j h t i w e c n a d r o c c a n i d e n i f e d s i r e t e m a r a p s i h t : 4 e t o n
idt ? / ics ? lvds fanout buffer 6 ics854s14aki rev. a february 23, 2007 ICS854S14I low skew, 1-to-4 differential-t o-lvds fanout buffer preliminary p arameter m easurement i nformation o utput l oad ac t est c ircuit d ifferential i nput l evel o utput s kew p art - to -p art s kew o utput r ise /f all t ime p ropagation d elay gnd nin v dd in scope qx nqx lvds 2.5v5% power supply +? float gnd t sk(pp) t sk(o) nqx qx nqy qy pa r t 1 pa r t 2 nqx qx nqy qy clock outputs 20% 80% 80% 20% t r t f v od t pd nin q0:q3 nq0:nq3 in v ih cross points v in v il v dd
idt ? / ics ? lvds fanout buffer 7 ics854s14aki rev. a february 23, 2007 ICS854S14I low skew, 1-to-4 differential-t o-lvds fanout buffer preliminary s ingle e nded & d ifferential i nput v oltage s wing v in , v out 400mv (typical) v diff_in , v diff_out 800mv (typical) o ffset v oltage s etup ? ? ? 100 out out lv d s dc input v od / v od v dd out out lvds dc input ? ? ? v os / v os v dd d ifferential o utput v oltage s etup
idt ? / ics ? lvds fanout buffer 8 ics854s14aki rev. a february 23, 2007 ICS854S14I low skew, 1-to-4 differential-t o-lvds fanout buffer preliminary a pplication i nformation lvpecl i nput with b uilt -i n 50 t erminations i nterface the in /nin with built-in 50 terminations accepts lvds, lvpecl, lvhstl, cml, sstl and other differential signals. the signal must meet the v pp and v cmr input requirements. figures 2a to 2f show interface examples for the hiperclocks in/nin input with built-in 50 terminations driven by the most common driver types. the input interfaces suggested here are examples only. if the driver is from another vendor, use their termination recommendation. please consult with the vendor of the driver component to confirm the driver termination requirements. f igure 2a. h i p er c lock s in/nin i nput with b uilt - in 50 d riven by an lvds d river f igure 2b. h i p er c lock s in/nin i nput with b uilt - in 50 d riven by an lvpecl d river in nin vt 2.5v lvds 3.3v or 2.5v zo = 50 ohm zo = 50 ohm receiver with built-in 50 ohm zo = 50 ohm receiver with built-in 50 ohm zo = 50 ohm in nin vt 2.5v 2.5v r1 18 2.5v lvpecl f igure 2e. h i p er c lock s in/nin i nput with b uilt - in 50 d riven by a 3.3v lvpecl d river f igure 2c. h i p er c lock s in/nin i nput with b uilt - in 50 d riven by an o pen c ollector cml d river f igure 2d. h i p er c lock s in/nin i nput with b uilt - in 50 d riven by a cml d river with b uilt -i n 50 p ullup zo = 50 ohm 2.5v zo = 50 ohm in nin vt receiver with built-in 50 ohm 2.5v cml - open collector in nin vt receiver with built-in 50 ohm 2.5v zo = 50 ohm zo = 50 ohm cml - built-in 50 ohm pull-up 2.5v f igure 2f. h i p er c lock s in/nin i nput with b uilt - in 50 d riven by a 3.3v cml d river with b uilt -i n p ullup 2.5v 3.3v receiver with built-in 50 zo = 50 ohm zo = 50 ohm c1 c2 in vt nin ref_ac 50 ohm 50 ohm 3.3v lvpecl r5 100 - 200 ohm r5 100 - 200 ohm 2.5v 3.3v receiver with built-in 50 zo = 50 ohm zo = 50 ohm c1 c2 in vt nin ref_ac 50 ohm 50 ohm 3.3v cml with built-in pullup
idt ? / ics ? lvds fanout buffer 9 ics854s14aki rev. a february 23, 2007 ICS854S14I low skew, 1-to-4 differential-t o-lvds fanout buffer preliminary o utputs : lvds output all unused lvds outputs can be left floating. we recommend that there is no trace attached. both sides of the differential output pair should either be left floating or terminated. r ecommendations for u nused i nput and o utput p ins f igure 3. t ypical lvds d river t ermination 2.5v lvds d river t ermination figure 3 shows a typical termination for lvds driver in characteristic impedance of 100 differential (50 single) 2.5v 100 ohm differential transmission line 2.5v lvds_driv er r1 100 + - 100 differential transmission line transmission line environment. for buffer with multiple lvds driver, it is recommended to terminate the unused outputs. i nputs : lvcmos c ontrol p ins : all control pins have internal pull-ups; additional resistance is not required but can be added for additional protection. a 1k resistor can be used. exposed pad expose metal pad (ground pad) ground plane solder signal trace signal trace therm al via solder m ask f igure 4. p.c. b oard for e xposed p ad t hermal r elease p ath e xample t hermal r elease p ath the expose metal pad provides heat transfer from the device to the p.c. board. the expose metal pad is ground pad connected to ground plane through thermal via. the exposed pad on the device to the exposed metal pad on the pcb is contacted through solder as shown in figure 4. for further information, please refer to the application note on surface mount assembly of amkor?s thermally /electrically enhance leadframe base package, amkor technology.
idt ? / ics ? lvds fanout buffer 10 ics854s14aki rev. a february 23, 2007 ICS854S14I low skew, 1-to-4 differential-t o-lvds fanout buffer preliminary p ower c onsiderations this section provides information on power dissipation and junction temperature for the ICS854S14I. equations and example calculations are also provided. 1. power dissipation. the total power dissipation for the ICS854S14I is the sum of the core power plus the power dissipated in the load(s). the following is the power dissipation for v dd = 2.5v + 5% = 2.625v, which gives worst case results. ? power_ max = v dd_max * i dd_max = 2.625v * 88ma = 231mw 2. junction temperature. junction temperature, tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the device. the maximum recommended junction temperature for hiperclocks tm devices is 125c. the equation for tj is as follows: tj = ja * pd_total + t a tj = junction temperature ja = junction-to-ambient thermal resistance pd_total = total device power dissipation (example calculation is in section 1 above) t a = ambient temperature in order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance ja must be used. assuming a moderate air flow of 1 meter per second and a multi-layer board, the appropriate value is 43.9c/w per table 6 below. therefore, tj for an ambient temperature of 85c with all outputs switching is: 85c + 0.231w * 43.9c/w = 95.1c. this is well below the limit of 125c. this calculation is only an example. tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow , and the type of board (single layer or multi-layer). t able 6. t hermal r esistance ja for 24-p in vfqfn, f orced c onvection ja by velocity (meters per second) 0 1 2.5 multi-layer pcb, jedec standard test boards 50.2c/w 43.9c/w 39.3c/w
idt ? / ics ? lvds fanout buffer 11 ics854s14aki rev. a february 23, 2007 ICS854S14I low skew, 1-to-4 differential-t o-lvds fanout buffer preliminary r eliability i nformation t ransistor c ount the transistor count for ICS854S14I is: 288 t able 7. ja vs . a ir f low t able for 24 l ead vfqfn ja vs. 0 air flow (meters per second) 0 1 2.5 multi-layer pcb, jedec standard test boards 50.2c/w 43.9c/w 39.3c/w
idt ? / ics ? lvds fanout buffer 12 ics854s14aki rev. a february 23, 2007 ICS854S14I low skew, 1-to-4 differential-t o-lvds fanout buffer preliminary t able 8. p ackage d imensions for 24 l ead vfqfn p ackage o utline - k s uffix for 24 l ead vfqfn reference document: jedec publication 95, mo-220 n o i t a i r a v c e d e j s r e t e m i l l i m n i s n o i s n e m i d l l a l o b m y sm u m i n i mm u m i x a m n 4 2 a 0 8 . 00 . 1 1 a 05 0 . 0 3 a e c n e r e f e r 5 2 . 0 b 8 1 . 00 3 . 0 e c i s a b 0 5 . 0 n d 6 n e 6 d 4 2 d 0 3 . 25 5 . 2 e 4 2 e 0 3 . 25 5 . 2 l 0 3 . 00 5 . 0
idt ? / ics ? lvds fanout buffer 13 ics854s14aki rev. a february 23, 2007 ICS854S14I low skew, 1-to-4 differential-t o-lvds fanout buffer preliminary while the information presented herein has been checked for both accuracy and reliability, integrated device technology, incorp orated (idt) assumes no responsibility for either its use or for infringement of any patents or other rights of third parties, which would result from its use. no other circuits, patents, or l icenses are implied. this product is intended for use in normal commercial and industrial applications. any other applications such as those requiring high reliability or other extraordinary environmental r equirements are not recommended without additional processing by idt. idt reserves the right to change any circuitry or specifications without notice. idt does not authorize or warrant any idt product for use in life support devices or critical medical instruments. t able 9. o rdering i nformation r e b m u n r e d r o / t r a pg n i k r a me g a k c a pg n i g a k c a p g n i p p i h se r u t a r e p m e t i k a 4 1 s 4 5 8d b t, n f q f v d a e l 4 2e b u tc 5 8 o t c 0 4 - t k a 4 1 s 4 5 8d b tn f q f v d a e l 4 2l e e r & e p a t 0 0 5 2c 5 8 o t c 0 4 - f l i k a 4 1 s 4 5 8l i a 4 1 sn f q f v " e e r f - d a e l " d a e l 4 2e b u tc 5 8 o t c 0 4 - t f l i k a 4 1 s 4 5 8l i a 4 1 sn f q f v " e e r f - d a e l " d a e l 4 2l e e r & e p a t 0 0 5 2c 5 8 o t c 0 4 - . t n a i l p m o c s h o r e r a d n a n o i t a r u g i f n o c e e r f - b p e h t e r a r e b m u n t r a p e h t o t x i f f u s " f l " n a h t i w d e r e d r o e r a t a h t s t r a p : e t o n
innovate with idt and accelerate your future networks. contact: www.idt.com for sales 800-345-7015 408-284-8200 fax: 408-284-2775 for tech support netcom@idt.com 480-763-2056 corporate headquarters integrated device t echnology, inc. 6024 silver creek valley road san jose, ca 95138 united states 800 345 7015 +408 284 8200 (outside u.s.) asia pacific and japan integrated device technology singapore (1997) pte. ltd. reg. no. 199707558g 435 orchard road #20-03 wisma atria singapore 238877 +65 6 887 5505 europe idt europe, limited 321 kingston road leatherhead, surrey kt22 7tu england +44 (0) 1372 363 339 fax: +44 (0) 1372 378851 ? 2006 integrated device technology, inc. all rights reserved. product specifications subject to change without notice. idt, th e idt logo, ics and hiperclocks are trademarks of integrated device technology, inc. accelerated thinking is a service mark of integrated device technology, inc. all other br ands, product names and marks are or may be trademarks or registered trademarks used to identify products or services of their respective owners. printed in usa ICS854S14I low skew, 1-to-4 differential-t o-lvds fanout buffer preliminary

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